uart.c 11 KB

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  1. /*
  2. for GD32F3x0
  3. */
  4. #include "gd32f30x.h"
  5. #include <stdio.h>
  6. #include "systick.h"
  7. #include "uart.h"
  8. #include "./mcu_sdk/mcu_api.h"
  9. uint8_t usart0_tx_len=0,usart1_tx_len=0;
  10. uint8_t usart0_tx_cnt=0,usart1_tx_cnt=0;
  11. uint8_t usart0_tx[64] = {1,2,3,4,5,6,7,8,9,10};
  12. uint8_t usart0_rx[128];
  13. uint8_t usart1_rx[128];
  14. uint8_t usart1_tx[64] = {1,2,3,4,5,6,7,8,9,10};
  15. uint8_t rx_length;
  16. uint8_t receivesize = 0;
  17. volatile uint16_t rxcount = 0;
  18. //
  19. void gpio_uart_config(void)
  20. {
  21. rcu_periph_clock_enable(RCU_GPIOA); // 使能GPIOA时钟
  22. rcu_periph_clock_enable(RCU_USART0); // 使能USART1时钟
  23. gpio_init(GPIOA, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_9); // 初始化PA9,复用为USART1_TX
  24. gpio_init(GPIOA, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, GPIO_PIN_10); // 初始化PA10,复用为USART1_RX
  25. /* usart_deinit(USART0); // 复位USART1
  26. // 配置USART1的参数
  27. usart_baudrate_set(USART0, 115200U); // 波特率设置为115200
  28. usart_word_length_set(USART0, USART_WL_8BIT); // 数据位长度设置为8位
  29. usart_stop_bit_set(USART0, USART_STB_1BIT); // 停止位设置为1位
  30. usart_parity_config(USART0, USART_PM_NONE); // 无校验位
  31. usart_hardware_flow_rts_config(USART0, USART_RTS_DISABLE); // 禁用RTS
  32. usart_hardware_flow_cts_config(USART0, USART_CTS_DISABLE); // 禁用CTS
  33. usart_receive_config(USART0, USART_RECEIVE_ENABLE); // 使能接收
  34. usart_transmit_config(USART0, USART_TRANSMIT_ENABLE); // 使能发送
  35. usart_enable(USART0); // 使能USART1*/
  36. }
  37. /*!
  38. \brief configure the USART0
  39. \param[in] none
  40. \param[out] none
  41. \retval none
  42. */
  43. void usart_config(void)
  44. {
  45. /* enable USART0 clock */
  46. nvic_priority_group_set(NVIC_PRIGROUP_PRE2_SUB2);
  47. nvic_irq_enable(USART0_IRQn, 2, 0);
  48. rcu_periph_clock_enable(RCU_USART0);
  49. /* USART0 configure */
  50. usart_deinit(USART0);
  51. usart_baudrate_set(USART0, 115200U);
  52. usart_word_length_set(USART0, USART_WL_8BIT); // 帧数据字长
  53. usart_stop_bit_set(USART0, USART_STB_1BIT); // 停止位1位
  54. usart_parity_config(USART0, USART_PM_NONE); // 无奇偶校验位
  55. usart_receive_config(USART0, USART_RECEIVE_ENABLE);
  56. usart_transmit_config(USART0, USART_TRANSMIT_ENABLE);
  57. usart_enable(USART0);
  58. usart_interrupt_enable(USART0, USART_INT_RBNE);
  59. }
  60. uint8_t mUart0Send1ByteEnd = 0;
  61. void start_usart0_tx(uint8_t tx_buffer[], uint8_t length)
  62. {
  63. int a=0,b=0;
  64. usart0_tx_len = length;
  65. usart0_tx_cnt = 1;
  66. // usart0_tx_ptr = tx_buffer;
  67. usart_data_transmit(USART0, (uint8_t) tx_buffer[0]);
  68. mUart0Send1ByteEnd = 0;
  69. //printf("2222mUart0Send1ByteEnd %x\r\n",mUart0Send1ByteEnd);
  70. usart_interrupt_enable(USART0, USART_INT_TBE);
  71. // while(mUart0Send1ByteEnd == 0)printf("221313131mUart0Send1ByteEnd %x\r\n",mUart0Send1ByteEnd);;
  72. //printf("224122mUart0Send1ByteEnd %x\r\n",mUart0Send1ByteEnd);
  73. while(1)
  74. {
  75. b++;
  76. a++;
  77. if(a!=b) break;
  78. if(mUart0Send1ByteEnd == 1) break;
  79. }
  80. }
  81. extern void uart_receive_input(unsigned char value);
  82. void USART0_IRQHandler(void)
  83. {
  84. /*if(RESET != usart_interrupt_flag_get(USART0, USART_INT_FLAG_RBNE)) {
  85. usart0_rx[0] = usart_data_receive(USART0);
  86. // receive data
  87. usart0_rx[rxcount++] = usart_data_receive(USART0);
  88. if(rxcount == receivesize) {
  89. printf("\r\n ");
  90. usart_interrupt_disable(USART0, USART_INT_RBNE);
  91. }
  92. }*/
  93. if(RESET != usart_interrupt_flag_get(USART0, USART_INT_FLAG_RBNE)) {
  94. usart0_rx[0] = usart_data_receive(USART0);
  95. uart_receive_input(usart0_rx[0]);//zigbee 串口接收处理函数
  96. /* receive data
  97. usart0_rx[rxcount++] = usart_data_receive(USART0);
  98. if(rxcount == receivesize) {
  99. usart_interrupt_disable(EVAL_COM, USART_INT_RBNE);
  100. }*/
  101. }
  102. if(RESET != usart_interrupt_flag_get(USART0, USART_INT_FLAG_TBE)) {
  103. /* transmit data */
  104. mUart0Send1ByteEnd = 1;
  105. // printf("21212mUart0Send1ByteEnd %x\r\n",mUart0Send1ByteEnd);
  106. if(usart0_tx_cnt<usart0_tx_len)
  107. usart_data_transmit(USART0, usart0_tx[usart0_tx_cnt++]);
  108. else
  109. usart_interrupt_disable(USART0, USART_INT_TBE);
  110. }
  111. }
  112. int fputc(int ch, FILE *f)
  113. {
  114. usart_data_transmit(USART0,(uint8_t) ch);
  115. while(RESET == usart_flag_get(USART0, USART_FLAG_TBE)); // 等待发送数据缓冲区标志置位
  116. return ch;
  117. }
  118. //以下为IDLE模式串口配置
  119. /*void gpio_uart_config(void)
  120. {
  121. rcu_periph_clock_enable(RCU_GPIOA);
  122. gpio_af_set(GPIOA, GPIO_AF_1, GPIO_PIN_9);
  123. gpio_af_set(GPIOA, GPIO_AF_1, GPIO_PIN_10);
  124. gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_9);
  125. gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, GPIO_PIN_9);
  126. gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_10);
  127. gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, GPIO_PIN_10);
  128. gpio_af_set(GPIOA, GPIO_AF_1, GPIO_PIN_2);
  129. gpio_af_set(GPIOA, GPIO_AF_1, GPIO_PIN_3);
  130. gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_2);
  131. gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, GPIO_PIN_2);
  132. gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_3);
  133. gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, GPIO_PIN_3);
  134. // enable the LED GPIO clock
  135. rcu_periph_clock_enable(RCU_GPIOC);
  136. // configure led GPIO port/
  137. //gpio_mode_set(GPIOC, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_2);
  138. //gpio_output_options_set(GPIOC, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_2);
  139. //gpio_bit_reset(GPIOC, GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_2);
  140. }
  141. void usart_config(void)
  142. {
  143. dma_parameter_struct dma_init_struct;
  144. rcu_periph_clock_enable(RCU_USART0);
  145. rcu_periph_clock_enable(RCU_USART1);
  146. rcu_periph_clock_enable(RCU_DMA);
  147. nvic_priority_group_set(NVIC_PRIGROUP_PRE2_SUB2);
  148. nvic_irq_enable(USART0_IRQn, 0, 0);
  149. nvic_irq_enable(USART1_IRQn, 0, 0);
  150. usart_deinit(USART0);
  151. usart_baudrate_set(USART0, 115200U);
  152. usart_receive_config(USART0, USART_RECEIVE_ENABLE);
  153. usart_transmit_config(USART0, USART_TRANSMIT_ENABLE);
  154. usart_enable(USART0);
  155. usart_interrupt_enable(USART0, USART_INT_IDLE);
  156. usart_dma_transmit_config(USART0, USART_DENT_ENABLE);
  157. usart_dma_receive_config(USART0, USART_DENR_ENABLE);
  158. dma_deinit(DMA_CH1);
  159. dma_struct_para_init(&dma_init_struct);
  160. dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
  161. dma_init_struct.memory_addr = (uint32_t)usart0_tx;
  162. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  163. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
  164. dma_init_struct.number = 10;
  165. dma_init_struct.periph_addr = (uint32_t) &USART_TDATA(USART0);
  166. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  167. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
  168. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  169. dma_init(DMA_CH1, &dma_init_struct);
  170. dma_circulation_disable(DMA_CH1);
  171. dma_memory_to_memory_disable(DMA_CH1);
  172. dma_deinit(DMA_CH2);
  173. dma_struct_para_init(&dma_init_struct);
  174. dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
  175. dma_init_struct.memory_addr = (uint32_t)usart0_rx;
  176. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  177. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
  178. dma_init_struct.number = 10;
  179. dma_init_struct.periph_addr = (uint32_t) &USART_RDATA(USART0);
  180. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  181. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
  182. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  183. dma_init(DMA_CH2, &dma_init_struct);
  184. dma_channel_enable(DMA_CH2);
  185. dma_circulation_disable(DMA_CH2);
  186. dma_memory_to_memory_disable(DMA_CH2);
  187. usart_deinit(USART1);
  188. usart_baudrate_set(USART1, 115200U);
  189. usart_receive_config(USART1, USART_RECEIVE_ENABLE);
  190. usart_transmit_config(USART1, USART_TRANSMIT_ENABLE);
  191. usart_interrupt_enable(USART1, USART_INT_IDLE);
  192. usart_enable(USART1);
  193. usart_dma_transmit_config(USART1, USART_DENT_ENABLE);
  194. usart_dma_receive_config(USART1, USART_DENR_ENABLE);
  195. dma_deinit(DMA_CH3);
  196. dma_struct_para_init(&dma_init_struct);
  197. dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
  198. dma_init_struct.memory_addr = (uint32_t)usart1_tx;
  199. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  200. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
  201. dma_init_struct.number = 10;
  202. dma_init_struct.periph_addr = (uint32_t) &USART_TDATA(USART1);
  203. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  204. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
  205. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  206. dma_init(DMA_CH3, &dma_init_struct);
  207. dma_circulation_disable(DMA_CH3);
  208. dma_memory_to_memory_disable(DMA_CH3);
  209. dma_deinit(DMA_CH4);
  210. dma_struct_para_init(&dma_init_struct);
  211. dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
  212. dma_init_struct.memory_addr = (uint32_t)usart1_rx;
  213. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  214. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
  215. dma_init_struct.number = 10;
  216. dma_init_struct.periph_addr = (uint32_t) &USART_RDATA(USART1);
  217. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  218. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
  219. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  220. dma_init(DMA_CH4, &dma_init_struct);
  221. dma_channel_enable(DMA_CH4);
  222. dma_circulation_disable(DMA_CH4);
  223. dma_memory_to_memory_disable(DMA_CH4);
  224. }
  225. void start_usart0_tx(uint8_t tx_buffer[], uint8_t length)
  226. {
  227. dma_channel_disable(DMA_CH1);
  228. dma_memory_address_config(DMA_CH1, (uint32_t)tx_buffer);
  229. dma_transfer_number_config(DMA_CH1, length);
  230. dma_channel_enable(DMA_CH1);
  231. }
  232. void start_usart1_tx(uint8_t tx_buffer[], uint8_t length)
  233. {
  234. dma_channel_disable(DMA_CH3);
  235. dma_memory_address_config(DMA_CH3, (uint32_t)tx_buffer);
  236. dma_transfer_number_config(DMA_CH3, length);
  237. dma_channel_enable(DMA_CH3);
  238. }
  239. void USART0_IRQHandler(void)
  240. {
  241. if(RESET != usart_interrupt_flag_get(USART0, USART_INT_FLAG_IDLE))
  242. {
  243. usart_interrupt_flag_clear(USART0, USART_INT_FLAG_IDLE);
  244. rx_length = 10 - dma_transfer_number_get(DMA_CH2);
  245. dma_channel_disable(DMA_CH2);
  246. dma_memory_address_config(DMA_CH2, (uint32_t)usart0_rx);
  247. dma_transfer_number_config(DMA_CH2, 10);
  248. dma_channel_enable(DMA_CH2);
  249. start_usart0_tx(usart0_rx, rx_length);
  250. }
  251. }
  252. void USART1_IRQHandler(void)
  253. {
  254. if(RESET != usart_interrupt_flag_get(USART1, USART_INT_FLAG_IDLE))
  255. {
  256. usart_interrupt_flag_clear(USART1, USART_INT_FLAG_IDLE);
  257. rx_length = 10 - dma_transfer_number_get(DMA_CH4);
  258. dma_channel_disable(DMA_CH4);
  259. dma_memory_address_config(DMA_CH4, (uint32_t)usart1_rx);
  260. dma_transfer_number_config(DMA_CH4, 10);
  261. dma_channel_enable(DMA_CH4);
  262. start_usart1_tx(usart1_rx, rx_length);
  263. }
  264. }
  265. */