gd32f30x_fwdgt.c 6.8 KB

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  1. /*!
  2. \file gd32f30x_fwdgt.c
  3. \brief FWDGT driver
  4. \version 2023-12-30, V2.2.0, firmware for GD32F30x
  5. */
  6. /*
  7. Copyright (c) 2020, GigaDevice Semiconductor Inc.
  8. Redistribution and use in source and binary forms, with or without modification,
  9. are permitted provided that the following conditions are met:
  10. 1. Redistributions of source code must retain the above copyright notice, this
  11. list of conditions and the following disclaimer.
  12. 2. Redistributions in binary form must reproduce the above copyright notice,
  13. this list of conditions and the following disclaimer in the documentation
  14. and/or other materials provided with the distribution.
  15. 3. Neither the name of the copyright holder nor the names of its contributors
  16. may be used to endorse or promote products derived from this software without
  17. specific prior written permission.
  18. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  19. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  20. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  22. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  24. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  25. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  26. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  27. OF SUCH DAMAGE.
  28. */
  29. #include "gd32f30x_fwdgt.h"
  30. /* write value to FWDGT_CTL_CMD bit field */
  31. #define CTL_CMD(regval) (BITS(0,15) & ((uint32_t)(regval) << 0))
  32. /* write value to FWDGT_RLD_RLD bit field */
  33. #define RLD_RLD(regval) (BITS(0,11) & ((uint32_t)(regval) << 0))
  34. /*!
  35. \brief enable write access to FWDGT_PSC and FWDGT_RLD
  36. \param[in] none
  37. \param[out] none
  38. \retval none
  39. */
  40. void fwdgt_write_enable(void)
  41. {
  42. FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
  43. }
  44. /*!
  45. \brief disable write access to FWDGT_PSC and FWDGT_RLD
  46. \param[in] none
  47. \param[out] none
  48. \retval none
  49. */
  50. void fwdgt_write_disable(void)
  51. {
  52. FWDGT_CTL = FWDGT_WRITEACCESS_DISABLE;
  53. }
  54. /*!
  55. \brief start the free watchdog timer counter
  56. \param[in] none
  57. \param[out] none
  58. \retval none
  59. */
  60. void fwdgt_enable(void)
  61. {
  62. FWDGT_CTL = FWDGT_KEY_ENABLE;
  63. }
  64. /*!
  65. \brief configure the free watchdog timer counter prescaler value
  66. \param[in] prescaler_value: specify prescaler value
  67. only one parameter can be selected which is shown as below:
  68. \arg FWDGT_PSC_DIV4: FWDGT prescaler set to 4
  69. \arg FWDGT_PSC_DIV8: FWDGT prescaler set to 8
  70. \arg FWDGT_PSC_DIV16: FWDGT prescaler set to 16
  71. \arg FWDGT_PSC_DIV32: FWDGT prescaler set to 32
  72. \arg FWDGT_PSC_DIV64: FWDGT prescaler set to 64
  73. \arg FWDGT_PSC_DIV128: FWDGT prescaler set to 128
  74. \arg FWDGT_PSC_DIV256: FWDGT prescaler set to 256
  75. \param[out] none
  76. \retval ErrStatus: ERROR or SUCCESS
  77. */
  78. ErrStatus fwdgt_prescaler_value_config(uint16_t prescaler_value)
  79. {
  80. uint32_t timeout = FWDGT_PSC_TIMEOUT;
  81. uint32_t flag_status = RESET;
  82. /* enable write access to FWDGT_PSC */
  83. FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
  84. /* wait until the PUD flag to be reset */
  85. do {
  86. flag_status = FWDGT_STAT & FWDGT_STAT_PUD;
  87. } while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
  88. if((uint32_t)RESET != flag_status) {
  89. return ERROR;
  90. }
  91. /* configure FWDGT */
  92. FWDGT_PSC = (uint32_t)prescaler_value;
  93. return SUCCESS;
  94. }
  95. /*!
  96. \brief configure the free watchdog timer counter reload value
  97. \param[in] reload_value: specify reload value(0x0000 - 0x0FFF)
  98. \param[out] none
  99. \retval ErrStatus: ERROR or SUCCESS
  100. */
  101. ErrStatus fwdgt_reload_value_config(uint16_t reload_value)
  102. {
  103. uint32_t timeout = FWDGT_RLD_TIMEOUT;
  104. uint32_t flag_status = RESET;
  105. /* enable write access to FWDGT_RLD */
  106. FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
  107. /* wait until the RUD flag to be reset */
  108. do {
  109. flag_status = FWDGT_STAT & FWDGT_STAT_RUD;
  110. } while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
  111. if((uint32_t)RESET != flag_status) {
  112. return ERROR;
  113. }
  114. FWDGT_RLD = RLD_RLD(reload_value);
  115. return SUCCESS;
  116. }
  117. /*!
  118. \brief reload the counter of FWDGT
  119. \param[in] none
  120. \param[out] none
  121. \retval none
  122. */
  123. void fwdgt_counter_reload(void)
  124. {
  125. FWDGT_CTL = FWDGT_KEY_RELOAD;
  126. }
  127. /*!
  128. \brief configure counter reload value, and prescaler divider value
  129. \param[in] reload_value: specify reload value(0x0000 - 0x0FFF)
  130. \param[in] prescaler_div: FWDGT prescaler value
  131. only one parameter can be selected which is shown as below:
  132. \arg FWDGT_PSC_DIV4: FWDGT prescaler set to 4
  133. \arg FWDGT_PSC_DIV8: FWDGT prescaler set to 8
  134. \arg FWDGT_PSC_DIV16: FWDGT prescaler set to 16
  135. \arg FWDGT_PSC_DIV32: FWDGT prescaler set to 32
  136. \arg FWDGT_PSC_DIV64: FWDGT prescaler set to 64
  137. \arg FWDGT_PSC_DIV128: FWDGT prescaler set to 128
  138. \arg FWDGT_PSC_DIV256: FWDGT prescaler set to 256
  139. \param[out] none
  140. \retval ErrStatus: ERROR or SUCCESS
  141. */
  142. ErrStatus fwdgt_config(uint16_t reload_value, uint8_t prescaler_div)
  143. {
  144. uint32_t timeout = FWDGT_PSC_TIMEOUT;
  145. uint32_t flag_status = RESET;
  146. /* enable write access to FWDGT_PSC,and FWDGT_RLD */
  147. FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
  148. /* wait until the PUD flag to be reset */
  149. do {
  150. flag_status = FWDGT_STAT & FWDGT_STAT_PUD;
  151. } while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
  152. if((uint32_t)RESET != flag_status) {
  153. return ERROR;
  154. }
  155. /* configure FWDGT */
  156. FWDGT_PSC = (uint32_t)prescaler_div;
  157. timeout = FWDGT_RLD_TIMEOUT;
  158. /* wait until the RUD flag to be reset */
  159. do {
  160. flag_status = FWDGT_STAT & FWDGT_STAT_RUD;
  161. } while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
  162. if((uint32_t)RESET != flag_status) {
  163. return ERROR;
  164. }
  165. FWDGT_RLD = RLD_RLD(reload_value);
  166. /* reload the counter */
  167. FWDGT_CTL = FWDGT_KEY_RELOAD;
  168. return SUCCESS;
  169. }
  170. /*!
  171. \brief get flag state of FWDGT
  172. \param[in] flag: flag to get
  173. only one parameter can be selected which is shown as below:
  174. \arg FWDGT_FLAG_PUD: a write operation to FWDGT_PSC register is on going
  175. \arg FWDGT_FLAG_RUD: a write operation to FWDGT_RLD register is on going
  176. \param[out] none
  177. \retval FlagStatus: SET or RESET
  178. */
  179. FlagStatus fwdgt_flag_get(uint16_t flag)
  180. {
  181. if(FWDGT_STAT & flag) {
  182. return SET;
  183. }
  184. return RESET;
  185. }