12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152 |
- /*!
- \file readme.txt
- \brief description of the TIMER0 DMA demo for gd32f30x
- \version 2017-02-10, V1.0.0, firmware for GD32F30x
- \version 2018-10-10, V1.1.0, firmware for GD32F30x
- \version 2018-12-25, V2.0.0, firmware for GD32F30x
- \version 2020-09-30, V2.1.0, firmware for GD32F30x
- */
- /*
- Copyright (c) 2020, GigaDevice Semiconductor Inc.
- Redistribution and use in source and binary forms, with or without modification,
- are permitted provided that the following conditions are met:
- 1. Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
- 2. Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
- 3. Neither the name of the copyright holder nor the names of its contributors
- may be used to endorse or promote products derived from this software without
- specific prior written permission.
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- OF SUCH DAMAGE.
- */
- This demo is based on the GD32307C-EVAL-V1.1 board, it shows how to
- use DMA with TIMER0 update request to transfer data from memory
- to TIMER0 capture compare register 0.
-
- TIMER0CLK is fixed to systemcoreclock, the TIMER0 prescaler is equal to 119
- so the TIMER0 counter clock used is 1MHz.
- The objective is to configure TIMER0 channel 0(PA8) to generate PWM signal with
- a frequency equal to 1KHz and a variable duty cycle(25%,50%,75%) that is changed
- by the DMA after a specific number of Update DMA request.
- The number of this repetitive requests is defined by the TIMER0 repetition counter,
- each 2 update requests, the TIMER0 Channel 0 duty cycle changes to the next new
- value defined by the buffer.
|