main.c 9.9 KB

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  1. /*!
  2. \file main.c
  3. \brief SPI simplex communication using DMA
  4. \version 2022-05-30, V1.0.0, firmware for GD32F30x
  5. */
  6. /*
  7. Copyright (c) 2020, GigaDevice Semiconductor Inc.
  8. Redistribution and use in source and binary forms, with or without modification,
  9. are permitted provided that the following conditions are met:
  10. 1. Redistributions of source code must retain the above copyright notice, this
  11. list of conditions and the following disclaimer.
  12. 2. Redistributions in binary form must reproduce the above copyright notice,
  13. this list of conditions and the following disclaimer in the documentation
  14. and/or other materials provided with the distribution.
  15. 3. Neither the name of the copyright holder nor the names of its contributors
  16. may be used to endorse or promote products derived from this software without
  17. specific prior written permission.
  18. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  19. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  20. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  22. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  24. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  25. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  26. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  27. OF SUCH DAMAGE.
  28. */
  29. #include "gd32f30x.h"
  30. #include "gd32f307c_eval.h"
  31. //#define MASTER_TRAMSMIT_SLVAE_RECEIVE
  32. #define SLVAE_TRAMSMIT_MASTER_RECEIVE
  33. #define ARRAYSIZE 10
  34. uint8_t spi0_send_array[ARRAYSIZE] = {0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA};
  35. uint8_t spi1_send_array[ARRAYSIZE] = {0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA};
  36. uint8_t spi0_receive_array[ARRAYSIZE];
  37. uint8_t spi1_receive_array[ARRAYSIZE];
  38. uint32_t send_n = 0, receive_n = 0;
  39. void rcu_config(void);
  40. void gpio_config(void);
  41. void dma_config(void);
  42. void spi_config(void);
  43. ErrStatus memory_compare(uint8_t *src, uint8_t *dst, uint8_t length);
  44. /*!
  45. \brief main function
  46. \param[in] none
  47. \param[out] none
  48. \retval none
  49. */
  50. int main(void)
  51. {
  52. /* initialize the LEDs */
  53. gd_eval_led_init(LED2);
  54. gd_eval_led_init(LED3);
  55. /* enable peripheral clock */
  56. rcu_config();
  57. /* configure GPIO */
  58. gpio_config();
  59. /* configure DMA */
  60. dma_config();
  61. /* configure SPI */
  62. spi_config();
  63. #ifdef MASTER_TRAMSMIT_SLVAE_RECEIVE
  64. /* enable DMA channel */
  65. /* SPI0_Tx DMA channel */
  66. dma_channel_enable(DMA0, DMA_CH2);
  67. /* SPI1_Rx DMA channel */
  68. dma_channel_enable(DMA0, DMA_CH3);
  69. /* enable SPI DMA */
  70. spi_dma_enable(SPI1, SPI_DMA_RECEIVE);
  71. spi_dma_enable(SPI0, SPI_DMA_TRANSMIT);
  72. #endif /* master send and slave receive */
  73. #ifdef SLVAE_TRAMSMIT_MASTER_RECEIVE
  74. /* enable DMA channel */
  75. /* SPI0_Rx DMA channel */
  76. dma_channel_enable(DMA0, DMA_CH1);
  77. /* SPI1_Tx DMA channel */
  78. dma_channel_enable(DMA0, DMA_CH4);
  79. /* enable SPI DMA */
  80. spi_dma_enable(SPI1, SPI_DMA_TRANSMIT);
  81. spi_dma_enable(SPI0, SPI_DMA_RECEIVE);
  82. #endif /* slave send and master receive */
  83. /* enable SPI */
  84. spi_enable(SPI1);
  85. spi_enable(SPI0);
  86. /* enable SPI0 NSS output */
  87. spi_nss_output_enable(SPI0);
  88. #ifdef MASTER_TRAMSMIT_SLVAE_RECEIVE
  89. /* wait DMA transmit completed */
  90. while(!dma_flag_get(DMA0, DMA_CH2, DMA_FLAG_FTF)) {
  91. }
  92. while(!dma_flag_get(DMA0, DMA_CH3, DMA_FLAG_FTF)) {
  93. }
  94. /* compare receive data with send data */
  95. if(ERROR != memory_compare(spi1_receive_array, spi0_send_array, ARRAYSIZE)) {
  96. gd_eval_led_on(LED2);
  97. } else {
  98. gd_eval_led_off(LED2);
  99. }
  100. #endif /* master send and slave receive */
  101. #ifdef SLVAE_TRAMSMIT_MASTER_RECEIVE
  102. /* wait DMA transmit complete */
  103. while(!dma_flag_get(DMA0, DMA_CH4, DMA_FLAG_FTF)) {
  104. }
  105. while(!dma_flag_get(DMA0, DMA_CH1, DMA_FLAG_FTF)) {
  106. }
  107. /* compare receive data with send data */
  108. if(ERROR != memory_compare(spi0_receive_array, spi1_send_array, ARRAYSIZE)) {
  109. gd_eval_led_on(LED3);
  110. } else {
  111. gd_eval_led_off(LED3);
  112. }
  113. #endif /* slave send and master receive */
  114. /* disable SPI0 NSS output */
  115. spi_nss_output_disable(SPI0);
  116. /* disable SPI */
  117. spi_disable(SPI0);
  118. spi_disable(SPI1);
  119. while(1) {
  120. }
  121. }
  122. /*!
  123. \brief configure different peripheral clocks
  124. \param[in] none
  125. \param[out] none
  126. \retval none
  127. */
  128. void rcu_config(void)
  129. {
  130. rcu_periph_clock_enable(RCU_GPIOA);
  131. rcu_periph_clock_enable(RCU_GPIOB);
  132. rcu_periph_clock_enable(RCU_DMA0);
  133. rcu_periph_clock_enable(RCU_SPI0);
  134. rcu_periph_clock_enable(RCU_SPI1);
  135. rcu_periph_clock_enable(RCU_AF);
  136. }
  137. /*!
  138. \brief configure the GPIO peripheral
  139. \param[in] none
  140. \param[out] none
  141. \retval none
  142. */
  143. void gpio_config(void)
  144. {
  145. /* configure SPI0 GPIO: NSS/PA4, SCK/PA5,MOSI/PA7 */
  146. gpio_init(GPIOA, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_7);
  147. /* SPI0 GPIO config: MISO/PA6 */
  148. gpio_init(GPIOA, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, GPIO_PIN_6);
  149. /* SPI1 GPIO config: NSS/PB12, SCK/PB13, MOSI/PB15 */
  150. gpio_init(GPIOB, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_15);
  151. /* SPI1 GPIO config: MISO/PB14 */
  152. gpio_init(GPIOB, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_14);
  153. }
  154. /*!
  155. \brief configure the DMA peripheral
  156. \param[in] none
  157. \param[out] none
  158. \retval none
  159. */
  160. void dma_config(void)
  161. {
  162. dma_parameter_struct dma_init_struct;
  163. dma_struct_para_init(&dma_init_struct);
  164. /* configure SPI0 transmit DMA: DMA_CH2 */
  165. dma_deinit(DMA0, DMA_CH2);
  166. dma_init_struct.periph_addr = (uint32_t)&SPI_DATA(SPI0);
  167. dma_init_struct.memory_addr = (uint32_t)spi0_send_array;
  168. dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
  169. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
  170. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;
  171. dma_init_struct.priority = DMA_PRIORITY_LOW;
  172. dma_init_struct.number = ARRAYSIZE;
  173. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  174. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  175. dma_init(DMA0, DMA_CH2, &dma_init_struct);
  176. /* configure DMA mode */
  177. dma_circulation_disable(DMA0, DMA_CH2);
  178. dma_memory_to_memory_disable(DMA0, DMA_CH2);
  179. /* configure SPI0 receive DMA: DMA_CH1 */
  180. dma_deinit(DMA0, DMA_CH1);
  181. dma_init_struct.periph_addr = (uint32_t)&SPI_DATA(SPI0);
  182. dma_init_struct.memory_addr = (uint32_t)spi0_receive_array;
  183. dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
  184. dma_init_struct.priority = DMA_PRIORITY_HIGH;
  185. dma_init(DMA0, DMA_CH1, &dma_init_struct);
  186. /* configure DMA mode */
  187. dma_circulation_disable(DMA0, DMA_CH1);
  188. dma_memory_to_memory_disable(DMA0, DMA_CH1);
  189. /* configure SPI1 transmit DMA: DMA_CH4 */
  190. dma_deinit(DMA0, DMA_CH4);
  191. dma_init_struct.periph_addr = (uint32_t)&SPI_DATA(SPI1);
  192. dma_init_struct.memory_addr = (uint32_t)spi1_send_array;
  193. dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
  194. dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
  195. dma_init(DMA0, DMA_CH4, &dma_init_struct);
  196. /* configure DMA mode */
  197. dma_circulation_disable(DMA0, DMA_CH4);
  198. dma_memory_to_memory_disable(DMA0, DMA_CH4);
  199. /* configure SPI1 receive DMA: DMA_CH3 */
  200. dma_deinit(DMA0, DMA_CH3);
  201. dma_init_struct.periph_addr = (uint32_t)&SPI_DATA(SPI1);
  202. dma_init_struct.memory_addr = (uint32_t)spi1_receive_array;
  203. dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
  204. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  205. dma_init(DMA0, DMA_CH3, &dma_init_struct);
  206. /* configure DMA mode */
  207. dma_circulation_disable(DMA0, DMA_CH3);
  208. dma_memory_to_memory_disable(DMA0, DMA_CH3);
  209. }
  210. /*!
  211. \brief configure the SPI peripheral
  212. \param[in] none
  213. \param[out] none
  214. \retval none
  215. */
  216. void spi_config(void)
  217. {
  218. spi_parameter_struct spi_init_struct;
  219. /* deinitilize SPI and the parameters */
  220. spi_i2s_deinit(SPI0);
  221. spi_i2s_deinit(SPI1);
  222. spi_struct_para_init(&spi_init_struct);
  223. /* configure SPI0 parameter */
  224. #ifdef MASTER_TRAMSMIT_SLVAE_RECEIVE
  225. spi_init_struct.trans_mode = SPI_TRANSMODE_FULLDUPLEX;
  226. #endif /* master send and slave receive */
  227. #ifdef SLVAE_TRAMSMIT_MASTER_RECEIVE
  228. spi_init_struct.trans_mode = SPI_TRANSMODE_RECEIVEONLY;
  229. #endif /* slave send and master receive */
  230. spi_init_struct.device_mode = SPI_MASTER;
  231. spi_init_struct.frame_size = SPI_FRAMESIZE_8BIT;
  232. spi_init_struct.clock_polarity_phase = SPI_CK_PL_HIGH_PH_2EDGE;
  233. spi_init_struct.nss = SPI_NSS_HARD;
  234. spi_init_struct.prescale = SPI_PSC_256;
  235. spi_init_struct.endian = SPI_ENDIAN_MSB;
  236. spi_init(SPI0, &spi_init_struct);
  237. /* configure SPI1 parameter */
  238. #ifdef MASTER_TRAMSMIT_SLVAE_RECEIVE
  239. spi_init_struct.trans_mode = SPI_TRANSMODE_RECEIVEONLY;
  240. #endif /* master send and slave receive */
  241. #ifdef SLVAE_TRAMSMIT_MASTER_RECEIVE
  242. spi_init_struct.trans_mode = SPI_TRANSMODE_FULLDUPLEX;
  243. #endif /* slave send and master receive */
  244. spi_init_struct.device_mode = SPI_SLAVE;
  245. spi_init(SPI1, &spi_init_struct);
  246. }
  247. /*!
  248. \brief memory compare function
  249. \param[in] src: source data pointer
  250. \param[in] dst: destination data pointer
  251. \param[in] length: the compare data length
  252. \param[out] none
  253. \retval ErrStatus : ERROR or SUCCESS
  254. */
  255. ErrStatus memory_compare(uint8_t *src, uint8_t *dst, uint8_t length)
  256. {
  257. while(length--) {
  258. if(*src++ != *dst++) {
  259. return ERROR;
  260. }
  261. }
  262. return SUCCESS;
  263. }