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- /*!
- \file readme.txt
- \brief description of DACC_simultaneous_trigger_triangle_noise example
- \version 2017-02-10, V1.0.0, firmware for GD32F30x
- \version 2018-10-10, V1.1.0, firmware for GD32F30x
- \version 2018-12-25, V2.0.0, firmware for GD32F30x
- \version 2020-09-30, V2.1.0, firmware for GD32F30x
- */
- /*
- Copyright (c) 2023, GigaDevice Semiconductor Inc.
- Redistribution and use in source and binary forms, with or without modification,
- are permitted provided that the following conditions are met:
- 1. Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
- 2. Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
- 3. Neither the name of the copyright holder nor the names of its contributors
- may be used to endorse or promote products derived from this software without
- specific prior written permission.
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
- OF SUCH DAMAGE.
- */
- This example is based on the GD32F307C-EVAL-V1.1 board, it shows how to use DAC concurrent
- mode simultaneous trigger to generate triangle noise wave with same amplitude.
- TIMER5 is configured as following:
- - Up counting mode.
- - System clock devide into 1Mhz.
- - Update event per millisecond.
- - Update event as TRGO to trigger DAC0_OUT0 and DAC0_OUT1.
- DAC is configured as following:
- - Data 12-bit right alligned.
- - TIMER5 TRGO signal trigger DAC0_OUT0 and DAC0_OUT1.
- - DAC0_OUT0/DAC0_OUT1 is configured as PA4/PA5.
- - Triangle mode, with amplitude 1023.
- After system start-up, the triangle noise wave can be observed through the scilloscope.
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