port.c 12 KB

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  1. /*
  2. FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
  3. All rights reserved
  4. VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
  5. This file is part of the FreeRTOS distribution.
  6. FreeRTOS is free software; you can redistribute it and/or modify it under
  7. the terms of the GNU General Public License (version 2) as published by the
  8. Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
  9. ***************************************************************************
  10. >>! NOTE: The modification to the GPL is included to allow you to !<<
  11. >>! distribute a combined work that includes FreeRTOS without being !<<
  12. >>! obliged to provide the source code for proprietary components !<<
  13. >>! outside of the FreeRTOS kernel. !<<
  14. ***************************************************************************
  15. FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
  16. WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
  17. FOR A PARTICULAR PURPOSE. Full license text is available on the following
  18. link: http://www.freertos.org/a00114.html
  19. ***************************************************************************
  20. * *
  21. * FreeRTOS provides completely free yet professionally developed, *
  22. * robust, strictly quality controlled, supported, and cross *
  23. * platform software that is more than just the market leader, it *
  24. * is the industry's de facto standard. *
  25. * *
  26. * Help yourself get started quickly while simultaneously helping *
  27. * to support the FreeRTOS project by purchasing a FreeRTOS *
  28. * tutorial book, reference manual, or both: *
  29. * http://www.FreeRTOS.org/Documentation *
  30. * *
  31. ***************************************************************************
  32. http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
  33. the FAQ page "My application does not run, what could be wrong?". Have you
  34. defined configASSERT()?
  35. http://www.FreeRTOS.org/support - In return for receiving this top quality
  36. embedded software for free we request you assist our global community by
  37. participating in the support forum.
  38. http://www.FreeRTOS.org/training - Investing in training allows your team to
  39. be as productive as possible as early as possible. Now you can receive
  40. FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
  41. Ltd, and the world's leading authority on the world's leading RTOS.
  42. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
  43. including FreeRTOS+Trace - an indispensable productivity tool, a DOS
  44. compatible FAT file system, and our tiny thread aware UDP/IP stack.
  45. http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
  46. Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
  47. http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
  48. Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
  49. licenses offer ticketed support, indemnification and commercial middleware.
  50. http://www.SafeRTOS.com - High Integrity Systems also provide a safety
  51. engineered and independently SIL3 certified version for use in safety and
  52. mission critical applications that require provable dependability.
  53. 1 tab == 4 spaces!
  54. */
  55. /* Standard includes. */
  56. #include <stdlib.h>
  57. /* Scheduler includes. */
  58. #include "FreeRTOS.h"
  59. #include "task.h"
  60. /* Constants required to setup the initial task context. */
  61. #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
  62. #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
  63. #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
  64. #define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
  65. /* Constants required to setup the tick ISR. */
  66. #define portENABLE_TIMER ( ( uint8_t ) 0x01 )
  67. #define portPRESCALE_VALUE 0x00
  68. #define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
  69. #define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
  70. /* Constants required to setup the VIC for the tick ISR. */
  71. #define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
  72. #define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
  73. #define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
  74. /* Constants required to handle interrupts. */
  75. #define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 )
  76. #define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 )
  77. /*-----------------------------------------------------------*/
  78. /* The code generated by the Keil compiler does not maintain separate
  79. stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
  80. use the stack as per other ports. Instead a variable is used to keep
  81. track of the critical section nesting. This variable has to be stored
  82. as part of the task context and must be initialised to a non zero value. */
  83. #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
  84. volatile uint32_t ulCriticalNesting = 9999UL;
  85. /*-----------------------------------------------------------*/
  86. /* Setup the timer to generate the tick interrupts. */
  87. static void prvSetupTimerInterrupt( void );
  88. /*
  89. * The scheduler can only be started from ARM mode, so
  90. * vPortStartFirstSTask() is defined in portISR.c.
  91. */
  92. extern __asm void vPortStartFirstTask( void );
  93. /*-----------------------------------------------------------*/
  94. /*
  95. * See header file for description.
  96. */
  97. StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
  98. {
  99. StackType_t *pxOriginalTOS;
  100. /* Setup the initial stack of the task. The stack is set exactly as
  101. expected by the portRESTORE_CONTEXT() macro.
  102. Remember where the top of the (simulated) stack is before we place
  103. anything on it. */
  104. pxOriginalTOS = pxTopOfStack;
  105. /* To ensure asserts in tasks.c don't fail, although in this case the assert
  106. is not really required. */
  107. pxTopOfStack--;
  108. /* First on the stack is the return address - which in this case is the
  109. start of the task. The offset is added to make the return address appear
  110. as it would within an IRQ ISR. */
  111. *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
  112. pxTopOfStack--;
  113. *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
  114. pxTopOfStack--;
  115. *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
  116. pxTopOfStack--;
  117. *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
  118. pxTopOfStack--;
  119. *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
  120. pxTopOfStack--;
  121. *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
  122. pxTopOfStack--;
  123. *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
  124. pxTopOfStack--;
  125. *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
  126. pxTopOfStack--;
  127. *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
  128. pxTopOfStack--;
  129. *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
  130. pxTopOfStack--;
  131. *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
  132. pxTopOfStack--;
  133. *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
  134. pxTopOfStack--;
  135. *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
  136. pxTopOfStack--;
  137. *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
  138. pxTopOfStack--;
  139. *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
  140. pxTopOfStack--;
  141. *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
  142. pxTopOfStack--;
  143. /* The last thing onto the stack is the status register, which is set for
  144. system mode, with interrupts enabled. */
  145. *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
  146. if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL )
  147. {
  148. /* We want the task to start in thumb mode. */
  149. *pxTopOfStack |= portTHUMB_MODE_BIT;
  150. }
  151. pxTopOfStack--;
  152. /* The code generated by the Keil compiler does not maintain separate
  153. stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
  154. use the stack as per other ports. Instead a variable is used to keep
  155. track of the critical section nesting. This variable has to be stored
  156. as part of the task context and is initially set to zero. */
  157. *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
  158. return pxTopOfStack;
  159. }
  160. /*-----------------------------------------------------------*/
  161. BaseType_t xPortStartScheduler( void )
  162. {
  163. /* Start the timer that generates the tick ISR. */
  164. prvSetupTimerInterrupt();
  165. /* Start the first task. This is done from portISR.c as ARM mode must be
  166. used. */
  167. vPortStartFirstTask();
  168. /* Should not get here! */
  169. return 0;
  170. }
  171. /*-----------------------------------------------------------*/
  172. void vPortEndScheduler( void )
  173. {
  174. /* It is unlikely that the ARM port will require this function as there
  175. is nothing to return to. If this is required - stop the tick ISR then
  176. return back to main. */
  177. }
  178. /*-----------------------------------------------------------*/
  179. #if configUSE_PREEMPTION == 0
  180. /*
  181. * The cooperative scheduler requires a normal IRQ service routine to
  182. * simply increment the system tick.
  183. */
  184. void vNonPreemptiveTick( void ) __irq;
  185. void vNonPreemptiveTick( void ) __irq
  186. {
  187. /* Increment the tick count - this may make a delaying task ready
  188. to run - but a context switch is not performed. */
  189. xTaskIncrementTick();
  190. T0IR = portTIMER_MATCH_ISR_BIT; /* Clear the timer event */
  191. VICVectAddr = portCLEAR_VIC_INTERRUPT; /* Acknowledge the Interrupt */
  192. }
  193. #else
  194. /*
  195. **************************************************************************
  196. * The preemptive scheduler ISR is written in assembler and can be found
  197. * in the portASM.s file. This will only get used if portUSE_PREEMPTION
  198. * is set to 1 in portmacro.h
  199. **************************************************************************
  200. */
  201. void vPreemptiveTick( void );
  202. #endif
  203. /*-----------------------------------------------------------*/
  204. static void prvSetupTimerInterrupt( void )
  205. {
  206. uint32_t ulCompareMatch;
  207. /* A 1ms tick does not require the use of the timer prescale. This is
  208. defaulted to zero but can be used if necessary. */
  209. T0PR = portPRESCALE_VALUE;
  210. /* Calculate the match value required for our wanted tick rate. */
  211. ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
  212. /* Protect against divide by zero. Using an if() statement still results
  213. in a warning - hence the #if. */
  214. #if portPRESCALE_VALUE != 0
  215. {
  216. ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
  217. }
  218. #endif
  219. T0MR0 = ulCompareMatch;
  220. /* Generate tick with timer 0 compare match. */
  221. T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
  222. /* Setup the VIC for the timer. */
  223. VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
  224. VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
  225. /* The ISR installed depends on whether the preemptive or cooperative
  226. scheduler is being used. */
  227. #if configUSE_PREEMPTION == 1
  228. {
  229. VICVectAddr0 = ( uint32_t ) vPreemptiveTick;
  230. }
  231. #else
  232. {
  233. VICVectAddr0 = ( uint32_t ) vNonPreemptiveTick;
  234. }
  235. #endif
  236. VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
  237. /* Start the timer - interrupts are disabled when this function is called
  238. so it is okay to do this here. */
  239. T0TCR = portENABLE_TIMER;
  240. }
  241. /*-----------------------------------------------------------*/
  242. void vPortEnterCritical( void )
  243. {
  244. /* Disable interrupts as per portDISABLE_INTERRUPTS(); */
  245. __disable_irq();
  246. /* Now interrupts are disabled ulCriticalNesting can be accessed
  247. directly. Increment ulCriticalNesting to keep a count of how many times
  248. portENTER_CRITICAL() has been called. */
  249. ulCriticalNesting++;
  250. }
  251. /*-----------------------------------------------------------*/
  252. void vPortExitCritical( void )
  253. {
  254. if( ulCriticalNesting > portNO_CRITICAL_NESTING )
  255. {
  256. /* Decrement the nesting count as we are leaving a critical section. */
  257. ulCriticalNesting--;
  258. /* If the nesting level has reached zero then interrupts should be
  259. re-enabled. */
  260. if( ulCriticalNesting == portNO_CRITICAL_NESTING )
  261. {
  262. /* Enable interrupts as per portEXIT_CRITICAL(). */
  263. __enable_irq();
  264. }
  265. }
  266. }
  267. /*-----------------------------------------------------------*/