main.c 7.2 KB

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  1. /*!
  2. \file main.c
  3. \brief master transmitter slave receiver through DMA
  4. \version 2017-02-10, V1.0.0, firmware for GD32F30x
  5. \version 2018-10-10, V1.1.0, firmware for GD32F30x
  6. \version 2018-12-25, V2.0.0, firmware for GD32F30x
  7. \version 2020-09-30, V2.1.0, firmware for GD32F30x
  8. */
  9. /*
  10. Copyright (c) 2020, GigaDevice Semiconductor Inc.
  11. Redistribution and use in source and binary forms, with or without modification,
  12. are permitted provided that the following conditions are met:
  13. 1. Redistributions of source code must retain the above copyright notice, this
  14. list of conditions and the following disclaimer.
  15. 2. Redistributions in binary form must reproduce the above copyright notice,
  16. this list of conditions and the following disclaimer in the documentation
  17. and/or other materials provided with the distribution.
  18. 3. Neither the name of the copyright holder nor the names of its contributors
  19. may be used to endorse or promote products derived from this software without
  20. specific prior written permission.
  21. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  23. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  24. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  25. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  26. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  27. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  28. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  30. OF SUCH DAMAGE.
  31. */
  32. #include "gd32f30x.h"
  33. #include <stdio.h>
  34. #include "gd32f307c_eval.h"
  35. #define I2C0_SLAVE_ADDRESS7 0x82
  36. #define I2C1_SLAVE_ADDRESS7 0x72
  37. #define ARRAYNUM(arr_nanme) (uint32_t)(sizeof(arr_nanme) / sizeof(*(arr_nanme)))
  38. #define I2C0_DATA_ADDRESS 0x40005410
  39. #define I2C1_DATA_ADDRESS 0x40005810
  40. #define BUFFER_SIZE (ARRAYNUM(i2c0_buff_tx)-1)
  41. uint8_t i2c0_buff_tx[] = "I2C DMA test";
  42. uint8_t i2c1_buff_rx[BUFFER_SIZE];
  43. __IO ErrStatus state = ERROR;
  44. void rcu_config(void);
  45. void gpio_config(void);
  46. void i2c_config(void);
  47. ErrStatus memory_compare(uint8_t *src, uint8_t *dst, uint16_t length);
  48. /*!
  49. \brief main function
  50. \param[in] none
  51. \param[out] none
  52. \retval none
  53. */
  54. int main(void)
  55. {
  56. dma_parameter_struct dma_init_struct;
  57. gd_eval_led_init(LED2);
  58. gd_eval_led_init(LED3);
  59. rcu_config();
  60. gpio_config();
  61. i2c_config();
  62. /* initialize DMA channel4 */
  63. dma_deinit(DMA0, DMA_CH4);
  64. dma_struct_para_init(&dma_init_struct);
  65. dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
  66. dma_init_struct.memory_addr = (uint32_t)i2c1_buff_rx;
  67. dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  68. dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
  69. dma_init_struct.number = BUFFER_SIZE;
  70. dma_init_struct.periph_addr = I2C1_DATA_ADDRESS;
  71. dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  72. dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
  73. dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  74. dma_init(DMA0, DMA_CH4, &dma_init_struct);
  75. /* initialize DMA channel5 */
  76. dma_deinit(DMA0, DMA_CH5);
  77. dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
  78. dma_init_struct.memory_addr = (uint32_t)i2c0_buff_tx;
  79. dma_init_struct.periph_addr = I2C0_DATA_ADDRESS;
  80. dma_init_struct.priority = DMA_PRIORITY_HIGH;
  81. dma_init(DMA0, DMA_CH5, &dma_init_struct);
  82. /* wait until I2C bus is idle */
  83. while(i2c_flag_get(I2C0, I2C_FLAG_I2CBSY));
  84. /* send a start condition to I2C bus */
  85. i2c_start_on_bus(I2C0);
  86. /* wait until SBSEND bit is set */
  87. while(!i2c_flag_get(I2C0, I2C_FLAG_SBSEND));
  88. /* send slave address to I2C bus*/
  89. i2c_master_addressing(I2C0, I2C1_SLAVE_ADDRESS7, I2C_TRANSMITTER);
  90. /* wait until ADDSEND bit is set*/
  91. while(!i2c_flag_get(I2C1, I2C_FLAG_ADDSEND));
  92. while(!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND));
  93. /* clear ADDSEND bit */
  94. i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
  95. i2c_flag_clear(I2C1, I2C_FLAG_ADDSEND);
  96. /* enable I2C1 DMA */
  97. i2c_dma_config(I2C1, I2C_DMA_ON);
  98. /* enable I2C0 DMA */
  99. i2c_dma_config(I2C0, I2C_DMA_ON);
  100. /* enable DMA0 channel4 */
  101. dma_channel_enable(DMA0, DMA_CH4);
  102. /* enable DMA0 channel5 */
  103. dma_channel_enable(DMA0, DMA_CH5);
  104. /* DMA0 channel4 full transfer finish flag */
  105. while(!dma_flag_get(DMA0, DMA_CH4, DMA_FLAG_FTF));
  106. /* DMA0 channel5 full transfer finish flag */
  107. while(!dma_flag_get(DMA0, DMA_CH5, DMA_FLAG_FTF));
  108. /* send a stop condition to I2C bus*/
  109. i2c_stop_on_bus(I2C0);
  110. /* wait until stop condition generate */
  111. while(I2C_CTL0(I2C0) & 0x0200);
  112. while(!i2c_flag_get(I2C1, I2C_FLAG_STPDET));
  113. /* clear the STPDET bit */
  114. i2c_enable(I2C1);
  115. state = memory_compare(i2c0_buff_tx, i2c1_buff_rx, BUFFER_SIZE);
  116. if(SUCCESS == state) {
  117. gd_eval_led_on(LED2);
  118. gd_eval_led_on(LED3);
  119. } else {
  120. gd_eval_led_off(LED2);
  121. gd_eval_led_off(LED3);
  122. }
  123. while(1) {
  124. }
  125. }
  126. /*!
  127. \brief memory compare function
  128. \param[in] src : source data
  129. \param[in] dst : destination data
  130. \param[in] length : the compare data length
  131. \param[out] none
  132. \retval ErrStatus : ERROR or SUCCESS
  133. */
  134. ErrStatus memory_compare(uint8_t *src, uint8_t *dst, uint16_t length)
  135. {
  136. while(length--) {
  137. if(*src++ != *dst++) {
  138. return ERROR;
  139. }
  140. }
  141. return SUCCESS;
  142. }
  143. /*!
  144. \brief enable the peripheral clock
  145. \param[in] none
  146. \param[out] none
  147. \retval none
  148. */
  149. void rcu_config(void)
  150. {
  151. /* enable GPIOB clock */
  152. rcu_periph_clock_enable(RCU_GPIOB);
  153. /* enable I2C1 clock */
  154. rcu_periph_clock_enable(RCU_I2C1);
  155. /* enable I2C0 clock */
  156. rcu_periph_clock_enable(RCU_I2C0);
  157. /* enable DMA0 clock */
  158. rcu_periph_clock_enable(RCU_DMA0);
  159. }
  160. /*!
  161. \brief cofigure the GPIO ports.
  162. \param[in] none
  163. \param[out] none
  164. \retval none
  165. */
  166. void gpio_config(void)
  167. {
  168. /* connect PB6 to I2C0_SCL */
  169. /* connect PB7 to I2C0_SDA */
  170. /* connect PB10 to I2C1_SCL */
  171. /* connect PB11 to I2C1_SDA */
  172. gpio_init(GPIOB, GPIO_MODE_AF_OD, GPIO_OSPEED_50MHZ, GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_10 | GPIO_PIN_11);
  173. }
  174. /*!
  175. \brief cofigure the I2C0 and I2C1 interfaces
  176. \param[in] none
  177. \param[out] none
  178. \retval none
  179. */
  180. void i2c_config(void)
  181. {
  182. /* configure I2C0 clock */
  183. i2c_clock_config(I2C0, 100000, I2C_DTCY_2);
  184. /* configure I2C0 address */
  185. i2c_mode_addr_config(I2C0, I2C_I2CMODE_ENABLE, I2C_ADDFORMAT_7BITS, I2C0_SLAVE_ADDRESS7);
  186. /* enable I2C0 */
  187. i2c_enable(I2C0);
  188. /* enable acknowledge */
  189. i2c_ack_config(I2C0, I2C_ACK_ENABLE);
  190. /* configure I2C1 clock */
  191. i2c_clock_config(I2C1, 100000, I2C_DTCY_2);
  192. /* configure I2C1 address */
  193. i2c_mode_addr_config(I2C1, I2C_I2CMODE_ENABLE, I2C_ADDFORMAT_7BITS, I2C1_SLAVE_ADDRESS7);
  194. /* enable I2C1 */
  195. i2c_enable(I2C1);
  196. /* enable acknowledge */
  197. i2c_ack_config(I2C1, I2C_ACK_ENABLE);
  198. }