main.c 5.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192
  1. /*!
  2. \file main.c
  3. \brief DAC DMA convert demo
  4. \version 2017-02-10, V1.0.0, firmware for GD32F30x
  5. \version 2018-10-10, V1.1.0, firmware for GD32F30x
  6. \version 2018-12-25, V2.0.0, firmware for GD32F30x
  7. \version 2020-09-30, V2.1.0, firmware for GD32F30x
  8. */
  9. /*
  10. Copyright (c) 2023, GigaDevice Semiconductor Inc.
  11. Redistribution and use in source and binary forms, with or without modification,
  12. are permitted provided that the following conditions are met:
  13. 1. Redistributions of source code must retain the above copyright notice, this
  14. list of conditions and the following disclaimer.
  15. 2. Redistributions in binary form must reproduce the above copyright notice,
  16. this list of conditions and the following disclaimer in the documentation
  17. and/or other materials provided with the distribution.
  18. 3. Neither the name of the copyright holder nor the names of its contributors
  19. may be used to endorse or promote products derived from this software without
  20. specific prior written permission.
  21. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  23. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  24. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  25. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  26. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  27. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  28. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  30. OF SUCH DAMAGE.
  31. */
  32. #include "gd32f30x.h"
  33. #define CONVERT_NUM (10)
  34. #define DAC0_R8DH_ADDRESS (0x40007410)
  35. const uint8_t convertarr[CONVERT_NUM] = {0x00, 0x33, 0x66, 0x99, 0xCC, 0xFF, 0xCC, 0x99, 0x66, 0x33};
  36. /* configure RCU peripheral */
  37. void rcu_config(void);
  38. /* configure GPIO peripheral */
  39. void gpio_config(void);
  40. /* configure DMA peripheral */
  41. void dma_config(void);
  42. /* configure DAC peripheral */
  43. void dac_config(void);
  44. /* configure TIMER peripheral */
  45. void timer5_config(void);
  46. /*!
  47. \brief main function
  48. \param[in] none
  49. \param[out] none
  50. \retval none
  51. */
  52. int main(void)
  53. {
  54. /* configure RCU peripheral */
  55. rcu_config();
  56. /* configure GPIO peripheral */
  57. gpio_config();
  58. /* configure DMA peripheral */
  59. dma_config();
  60. /* configure DAC peripheral */
  61. dac_config();
  62. /* configure TIMER peripheral */
  63. timer5_config();
  64. while(1) {
  65. }
  66. }
  67. /*!
  68. \brief configure RCU peripheral
  69. \param[in] none
  70. \param[out] none
  71. \retval none
  72. */
  73. void rcu_config(void)
  74. {
  75. /* enable GPIOA clock */
  76. rcu_periph_clock_enable(RCU_GPIOA);
  77. /* enable DMA clock */
  78. rcu_periph_clock_enable(RCU_DMA1);
  79. /* enable DAC clock */
  80. rcu_periph_clock_enable(RCU_DAC);
  81. /* enable TIMER clock */
  82. rcu_periph_clock_enable(RCU_TIMER5);
  83. }
  84. /*!
  85. \brief configure GPIO peripheral
  86. \param[in] none
  87. \param[out] none
  88. \retval none
  89. */
  90. void gpio_config(void)
  91. {
  92. /* configure PA4 as DAC output */
  93. gpio_init(GPIOA, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, GPIO_PIN_4);
  94. }
  95. /*!
  96. \brief configure DMA peripheral
  97. \param[in] none
  98. \param[out] none
  99. \retval none
  100. */
  101. void dma_config(void)
  102. {
  103. dma_parameter_struct dma_struct;
  104. /* clear all the interrupt flags */
  105. dma_flag_clear(DMA1, DMA_CH2, DMA_INTF_GIF);
  106. dma_flag_clear(DMA1, DMA_CH2, DMA_INTF_FTFIF);
  107. dma_flag_clear(DMA1, DMA_CH2, DMA_INTF_HTFIF);
  108. dma_flag_clear(DMA1, DMA_CH2, DMA_INTF_ERRIF);
  109. /* configure the DMA1 channel 2 */
  110. dma_struct.periph_addr = DAC0_R8DH_ADDRESS;
  111. dma_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
  112. dma_struct.memory_addr = (uint32_t)convertarr;
  113. dma_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
  114. dma_struct.number = CONVERT_NUM;
  115. dma_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
  116. dma_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
  117. dma_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
  118. dma_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
  119. dma_init(DMA1, DMA_CH2, &dma_struct);
  120. dma_circulation_enable(DMA1, DMA_CH2);
  121. dma_channel_enable(DMA1, DMA_CH2);
  122. }
  123. /*!
  124. \brief configure DAC peripheral
  125. \param[in] none
  126. \param[out] none
  127. \retval none
  128. */
  129. void dac_config(void)
  130. {
  131. /* initialize DAC */
  132. dac_deinit(DAC0);
  133. /* DAC trigger config */
  134. dac_trigger_source_config(DAC0, DAC_OUT0, DAC_TRIGGER_T5_TRGO);
  135. /* DAC trigger enable */
  136. dac_trigger_enable(DAC0, DAC_OUT0);
  137. /* DAC wave mode config */
  138. dac_wave_mode_config(DAC0, DAC_OUT0, DAC_WAVE_DISABLE);
  139. /* DAC enable */
  140. dac_enable(DAC0, DAC_OUT0);
  141. /* DAC DMA function enable */
  142. dac_dma_enable(DAC0, DAC_OUT0);
  143. }
  144. /*!
  145. \brief configure TIMER peripheral
  146. \param[in] none
  147. \param[out] none
  148. \retval none
  149. */
  150. void timer5_config(void)
  151. {
  152. timer_parameter_struct timer_initpara;
  153. /* TIMER deinitialize */
  154. timer_deinit(TIMER5);
  155. /* TIMER configuration */
  156. timer_struct_para_init(&timer_initpara);
  157. timer_initpara.prescaler = 119;
  158. timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
  159. timer_initpara.counterdirection = TIMER_COUNTER_UP;
  160. timer_initpara.period = 999;
  161. timer_initpara.clockdivision = TIMER_CKDIV_DIV1;
  162. timer_initpara.repetitioncounter = 0;
  163. /* initialize TIMER init parameter struct */
  164. timer_init(TIMER5, &timer_initpara);
  165. /* TIMER master mode output trigger source: Update event */
  166. timer_master_output_trigger_source_select(TIMER5, TIMER_TRI_OUT_SRC_UPDATE);
  167. /* enable TIMER */
  168. timer_enable(TIMER5);
  169. }