#include "usart2.h" #include "modbus.h" #include "All_define.h" void BSP_UART2_Init(u16 bandvalue) { /* USART0 configure */ nvic_priority_group_set(NVIC_PRIGROUP_PRE2_SUB2); nvic_irq_enable(USART1_IRQn, 0, 0); rcu_periph_clock_enable(RCU_GPIOA); rcu_periph_clock_enable(RCU_GPIOC); rcu_periph_clock_enable(RCU_USART1); gpio_init(GPIOC,GPIO_MODE_OUT_PP,GPIO_OSPEED_50MHZ, GPIO_PIN_14); gpio_init(GPIOA,GPIO_MODE_IN_FLOATING,GPIO_OSPEED_50MHZ, GPIO_PIN_3); gpio_init(GPIOA,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ, GPIO_PIN_2); usart_deinit(USART1); usart_baudrate_set(USART1, bandvalue); usart_word_length_set(USART1, USART_WL_8BIT); usart_stop_bit_set(USART1, USART_STB_1BIT); usart_parity_config(USART1, USART_PM_NONE); usart_hardware_flow_rts_config(USART1, USART_RTS_DISABLE); usart_hardware_flow_cts_config(USART1, USART_CTS_DISABLE); usart_receive_config(USART1, USART_RECEIVE_ENABLE); usart_transmit_config(USART1, USART_TRANSMIT_ENABLE); // usart_interrupt_enable(USART1,USART_INT_RBNE); usart_enable(USART1); usart_interrupt_enable(USART1, USART_INT_RBNE); /*GPIO_InitTypeDef GPIO_InitStructure; USART_InitTypeDef USART_InitStructure; NVIC_InitTypeDef NVIC_InitStructure; RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); GPIO_StructInit(&GPIO_InitStructure); GPIO_InitStructure.GPIO_PIN = GPIO_PIN_14; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init(GPIOC, &GPIO_InitStructure); GPIO_InitStructure.GPIO_PIN = GPIO_PIN_3; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(GPIOA, &GPIO_InitStructure); GPIO_InitStructure.GPIO_PIN = GPIO_PIN_2; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(GPIOA, &GPIO_InitStructure); USART_StructInit(&USART_InitStructure); USART_InitStructure.USART_BaudRate = bandvalue; USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_Init(USART2, &USART_InitStructure); NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 7; NVIC_InitStructure.NVIC_IRQChannelSubPriority =0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); USART_Cmd(USART2, ENABLE); USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);*/ } volatile u8 ucRTUBuf[MB_SER_PDU_SIZE_MAX]; volatile u8 usRcvBufferPos; void prvvUARTRxISR( void ) { u8 ucByte = (u8)usart_data_receive(USART1); // printf(" /0x%x/ ",ucByte); switch ( eRcvState ) { case STATE_RX_INIT: vMBPortTimersEnable( ); break; case STATE_RX_ERROR: vMBPortTimersEnable( ); break; case STATE_RX_IDLE: // printf("32121\r\n"); usRcvBufferPos = 0; ucRTUBuf[usRcvBufferPos++] = ucByte; eRcvState = STATE_RX_RCV; vMBPortTimersEnable( ); break; case STATE_RX_RCV: //printf("331313\r\n"); if( usRcvBufferPos < MB_SER_PDU_SIZE_MAX ) { ucRTUBuf[usRcvBufferPos++] = ucByte; } else { eRcvState = STATE_RX_ERROR; } vMBPortTimersEnable( ); break; } //if(usRcvBufferPos==17) //printf(" len %d data= 0x%x/ \n ",usRcvBufferPos,ucRTUBuf[usRcvBufferPos-2]); // ucByte = (u8)usart_data_receive(USART1); } volatile u8 ucRTU_TBuf[MB_SER_PDU_SIZE_MAX]; volatile u8 usRcv_TBufferPos; void prvvUARTTxReadyISR( void ) { //printf(" send"); static u8 Send_total_length = 0; switch ( eSndState ) { case STATE_TX_IDLE: // printf("2222\r\n"); eMBRTUStart_Tx(); Send_total_length = 0; break; case STATE_TX_XMIT: if( usRcv_TBufferPos != 0 ) { //printf("////0x%x///", ucRTU_TBuf[Send_total_length]); usart_data_transmit(USART1, ucRTU_TBuf[Send_total_length]); while (usart_flag_get(USART1, USART_FLAG_TBE) == RESET); Send_total_length ++; usRcv_TBufferPos--; } else { //printf(" senqqqd"); Send_total_length = 0; eSndState = STATE_TX_IDLE; //USART_ITConfig(USART2, USART_IT_TXE, DISABLE); usart_interrupt_disable(USART1,USART_INT_TBE); } break; } }